From 102439862ef65b1e9cb69c6150a7f7c8246770d6 Mon Sep 17 00:00:00 2001
From: Yalcin Ozbek <yalcinozbekceng@gmail.com>
Date: Sat, 5 Nov 2022 02:36:48 +0300
Subject: [PATCH] feat: Setting the model name for arm based CPUs

- Added arm model and model name as map.
- The modelName is set again according to the model value when the model name is empty.
- Based on lscpu source code.. https://github.com/util-linux/util-linux/blob/master/sys-utils/lscpu-arm.c

---

Signed-off-by: Yalcin Ozbek <yalcinozbekceng@gmail.com>
---
 cpu/cpu_linux.go | 75 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)

diff --git a/cpu/cpu_linux.go b/cpu/cpu_linux.go
index 4f26230..63de828 100644
--- a/cpu/cpu_linux.go
+++ b/cpu/cpu_linux.go
@@ -17,6 +17,71 @@ import (
 
 var ClocksPerSec = float64(100)
 
+var armModelToModelName = map[uint64]string{
+	0x810: "ARM810",
+	0x920: "ARM920",
+	0x922: "ARM922",
+	0x926: "ARM926",
+	0x940: "ARM940",
+	0x946: "ARM946",
+	0x966: "ARM966",
+	0xa20: "ARM1020",
+	0xa22: "ARM1022",
+	0xa26: "ARM1026",
+	0xb02: "ARM11 MPCore",
+	0xb36: "ARM1136",
+	0xb56: "ARM1156",
+	0xb76: "ARM1176",
+	0xc05: "Cortex-A5",
+	0xc07: "Cortex-A7",
+	0xc08: "Cortex-A8",
+	0xc09: "Cortex-A9",
+	0xc0d: "Cortex-A17",
+	0xc0f: "Cortex-A15",
+	0xc0e: "Cortex-A17",
+	0xc14: "Cortex-R4",
+	0xc15: "Cortex-R5",
+	0xc17: "Cortex-R7",
+	0xc18: "Cortex-R8",
+	0xc20: "Cortex-M0",
+	0xc21: "Cortex-M1",
+	0xc23: "Cortex-M3",
+	0xc24: "Cortex-M4",
+	0xc27: "Cortex-M7",
+	0xc60: "Cortex-M0+",
+	0xd01: "Cortex-A32",
+	0xd02: "Cortex-A34",
+	0xd03: "Cortex-A53",
+	0xd04: "Cortex-A35",
+	0xd05: "Cortex-A55",
+	0xd06: "Cortex-A65",
+	0xd07: "Cortex-A57",
+	0xd08: "Cortex-A72",
+	0xd09: "Cortex-A73",
+	0xd0a: "Cortex-A75",
+	0xd0b: "Cortex-A76",
+	0xd0c: "Neoverse-N1",
+	0xd0d: "Cortex-A77",
+	0xd0e: "Cortex-A76AE",
+	0xd13: "Cortex-R52",
+	0xd20: "Cortex-M23",
+	0xd21: "Cortex-M33",
+	0xd40: "Neoverse-V1",
+	0xd41: "Cortex-A78",
+	0xd42: "Cortex-A78AE",
+	0xd43: "Cortex-A65AE",
+	0xd44: "Cortex-X1",
+	0xd46: "Cortex-A510",
+	0xd47: "Cortex-A710",
+	0xd48: "Cortex-X2",
+	0xd49: "Neoverse-N2",
+	0xd4a: "Neoverse-E1",
+	0xd4b: "Cortex-A78C",
+	0xd4c: "Cortex-X1C",
+	0xd4d: "Cortex-A715",
+	0xd4e: "Cortex-X3",
+}
+
 func init() {
 	clkTck, err := sysconf.Sysconf(sysconf.SC_CLK_TCK)
 	// ignore errors
@@ -179,6 +244,16 @@ func InfoWithContext(ctx context.Context) ([]InfoStat, error) {
 			c.Model = value
 		case "model name", "cpu":
 			c.ModelName = value
+			if c.ModelName == "" {
+				if v, err := strconv.ParseUint(c.Model, 0, 16); err == nil {
+					modelName, isThereModel := armModelToModelName[v]
+					if !isThereModel {
+						c.ModelName = "Undefined"
+					} else {
+						c.ModelName = modelName
+					}
+				}
+			}
 			if strings.Contains(value, "POWER8") ||
 				strings.Contains(value, "POWER7") {
 				c.Model = strings.Split(value, " ")[0]